Makino Hiroshi

写真a

Title

Professor

Graduating School 【 display / non-display

  • Kyoto University   Faculty of Science   JAPAN

Degree 【 display / non-display

  • The University of Tokyo -  Doctor (Engineering)  Nano/Microsystems

Research field 【 display / non-display

  • Integrated Circuits

 

Papers 【 display / non-display

  • A Ring Oscillator Based All-digital On-chip Vth Measurement Circuit and Its Demonstration on FPGA Board

    Hiroshi MAKINO  ( Single Author )

    大阪工業大学紀要理工編   67 ( 1 ) 13 - 21   2022.09

    Research paper (bulletin of university, research institution)  English

  • A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals

    Yoshifumi KAWAMURA, Naoya OKADA, Yoshio MATSUDA, Tetsuya MATSUMURA, Hiroshi MAKINO, Kazutami ARIMOTO  ( Multiple Authorship )

    IEICE Transactions on FUNDAMENTALS Vol.E99-A, No.5     2016.05

    Research paper (scientific journal)  English

  • Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio

    Shunji Nakata, Hiroshi Makino, Junpei Hosokawa, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda  ( Multiple Authorship )

    IEEE Transactions on Circuits and Systems-I     2014.07

    Research paper (scientific journal)  English

  • ANALYSIS OF VOLTAGE, CURRENT AND ENERGY DISSIPATION OF STEPWISE ADIABATIC CHARGING OF A CAPACITOR USING A NONRESONANT INDUCTOR CURRENT

     ( Multiple Authorship )

    Journal of Circuits, Systems, and Computers   23 ( 3 )  

    Research paper (scientific journal)  English

    DOI

  • Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-locked Loop

     ( Multiple Authorship )

    IEEE Transactions on Circuits and Systems-I   60 ( 4 ) 896 - 907  

    Research paper (scientific journal)  English

    DOI

Books 【 display / non-display

  • Semiconductor LSI Technology

    Hiroshi Makino, Yoji Mashiko, Hidekazu Yamamoto  ( Joint Work )

    Kyoritsu Shuppan Co., Ltd.    Scholarly Book  Japanese

Presentations 【 display / non-display

  • An Estimation of Operation limit of SRAM using Monte Carlo Simulation with Accelerated Error Appearance

    Kenta Takemura, Takafumi Komura, Hiroshi Makino

    Internal meeting  2021 IEICE General Conference  ( online )  Oral Presentation(general)

    2021.03
     
     

  • 高速動き予測アルゴリズムに関する研究

    M. Hiramori, R. Bandou, S. Iwade, H. Makino, T. Yoshimura and Y. Matsuda

    International conference  The 2016 IEEE 5th Global Conference on Consumer Electronics (GCCE 2016)  ( メルパルク京都 )  Oral Presentation(general)

    2016.10
     
     

  • 動画用動き予測アルゴリズムに関する研究

    R. Bandou, M. Hiramori, S. Iwade, H. Makino, T. Yoshimura and Y. Matsuda

    International conference  The 2016 IEEE 5th Global Conference on Consumer Electronics (GCCE 2016)  ( メルパルク京都 )  Oral Presentation(general)

    2016.10